An improved current mode logic latch for high‐speed applications - Kumawat - 2020 - International Journal of Communication Systems - Wiley Online Library
Help me calculate the device size of CML/SCL latch design and simulate the gain of it | Forum for Electronics
PDF) Novel Differential-Mode RTD/HBT MOBILE-based D-Flip Flop IC
MC74VHC74 datasheet - Dual D Flip-Flop with Set and Reset. The MC74VHC74
digital logic - D flip flop with asynchronous reset circuit design - Electrical Engineering Stack Exchange
An improved current mode logic latch for high‐speed applications - Kumawat - 2020 - International Journal of Communication Systems - Wiley Online Library
digital logic - Is there a way to change only one of the outputs of a D flip -flop? - Electrical Engineering Stack Exchange
Edge Triggered D Flip-Flop with Asynchronous Set and Reset Tutorial
![PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/a9f1b39596e7f08405b62eebe623914a1e5c78d1/2-Figure2-1.png "PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar")
PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar
PDF) Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices
NB7V52M - D Flip Flop, 1.8 V / 2.5 V Differential, with Reset and CML Outputs
PPT - Advantages of Using CMOS PowerPoint Presentation, free download - ID:6880895
The operation explanation of the D-type flip-flop
adding reset function to D Flip FLOP | Forum for Electronics
PDF) Resonant Tunneling Diode/HBT D-Flip Flop ICs Using Current Mode Logic-Type Monostable-Bistable Transition Logic Element with Complementary Outputs | Taeho Kim - Academia.edu
adding reset function to D Flip FLOP | Forum for Electronics
adding reset function to D Flip FLOP | Forum for Electronics
D-type Flip Flop Counter or Delay Flip-flop
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
D FLIP-FLOP
Part 01: Proposal and Overview. Dual Modulus Prescaler Using Current Mode Logic Goals 2.5 GHz Operation 8/9 Dual Modulus 0.18uM BSIM 3 Model. - ppt download
NB7V52MMNG Datasheet(PDF) - ON Semiconductor
High Speed Digital Blocks
